Alberto Riccardo Martinelli is a Ph.D. student in computer science at the University of Turin. He received his master’s degree with honors in Computer Science from the University of Turin.
Antonio Filgueras, Giovanni Agosta, Marco Aldinucci, Carlos Álvarez, Pasqua D'Ambra, Massimo Bernaschi, Andrea Biagioni, Daniele Cattaneo, Alessandro Celestini, Massimo Celino, Carlotta Chiarini, Francesca Lo Cicero, Paolo Cretaro, William Fornaciari, Ottorino Frezza, Andrea Galimberti, Francesco Giacomini, Juan Miguel Haro Ruiz, Francesco Iannone, Daniel Jaschke, Daniel Jiménez-González, Michał Kulczewski, Alberto Leva, Alessandro Lonardo, Michele Martinelli, Xavier Martorell, Simone Montangero, Lucas Morais, Ariel Oleksiak, Paolo Palazzari, Luca Pontisso, Federico Reghenzani, Cristian Rossi, Sergio Saponara, Carlo Saverio Lodi, Francesco Simula, Federico Terraneo, Piero Vicini, Miquel Vidal, Davide Zoni, Giuseppe Zummo
Microprocessors and Microsystems
icsc textarossa
The TEXTAROSSA project aims to bridge the technology gaps that exascale computing systems are currently facing and will be key in the near future to overcome performance and energy efficiency challenges. This project provides solutions for improved energy efficiency by using state-of-the-art cooling and thermal control, seamless integration of heterogeneous accelerators in HPC multi-node platforms, and new arithmetic methods tailored to heterogeneous hardware platforms. Challenges are tackled through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models, and tools derived from European research.
@article{2026:textarossa:micpro,
abstract = {The TEXTAROSSA project aims to bridge the technology gaps that exascale computing systems are currently facing and will be key in the near future to overcome performance and energy efficiency challenges. This project provides solutions for improved energy efficiency by using state-of-the-art cooling and thermal control, seamless integration of heterogeneous accelerators in HPC multi-node platforms, and new arithmetic methods tailored to heterogeneous hardware platforms. Challenges are tackled through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models, and tools derived from European research.},
author = {Filgueras, Antonio and Agosta, Giovanni and Aldinucci, Marco and {\'A}lvarez, Carlos and D'Ambra, Pasqua and Bernaschi, Massimo and Biagioni, Andrea and Cattaneo, Daniele and Celestini, Alessandro and Celino, Massimo and Chiarini, Carlotta and Lo Cicero, Francesca and Cretaro, Paolo and Fornaciari, William and Frezza, Ottorino and Galimberti, Andrea and Giacomini, Francesco and de Haro Ruiz, Juan Miguel and Iannone, Francesco and Jaschke, Daniel and Jim{\'e}nez-Gonz{\'a}lez, Daniel and Kulczewski, Micha{\l} and Leva, Alberto and Lonardo, Alessandro and Martinelli, Michele and Martorell, Xavier and Montangero, Simone and Morais, Lucas and Oleksiak, Ariel and Palazzari, Paolo and Pontisso, Luca and Reghenzani, Federico and Rossi, Cristian and Saponara, Sergio and Lodi, Carlo Saverio and Simula, Francesco and Terraneo, Federico and Vicini, Piero and Vidal, Miquel and Zoni, Davide and Zummo, Giuseppe},
doi = {10.1016/j.micpro.2026.105254},
journal = {Microprocessors and Microsystems},
keywords = {textarossa, icsc},
title = {The TEXTAROSSA project: Cool all the Way Down to the Hardware},
url = {https://www.sciencedirect.com/science/article/pii/S0141933126000116?pes=vor&utm_source=scopus&getft_integrator=scopus#sec3},
volume = {122},
year = {2026},
bdsk-url-1 = {https://www.sciencedirect.com/science/article/pii/S0141933126000116?pes=vor&utm_source=scopus&getft_integrator=scopus#sec3},
bdsk-url-2 = {https://doi.org/10.1016/j.micpro.2026.105254}}
Marco Edoardo Santimaria, Alberto R. Martinelli, Iacopo Colonnelli, Barbara Cantalupo, Massimo Torquati, Marco Aldinucci
International Journal of Parallel Programming
capio icsc
The performance bottleneck in file-based workflows remains a pressing issue in the realm of I/O-based workflows. To address this challenge, a novel annotation language has been developed. CAPIO-CL is positioned as an innovative I/O coordination language, enabling users to annotate data dependencies within file-based workflows with synchronization semantics pertinent to the involved files and directories. Through the information provided by the language, optimization opportunities arise in streaming and preemptive data movement. This paper serves to illustrate the semantics and syntax enabling CAPIO-CL to enhance the performance of in situ workflows without necessitating the rewriting or modification of the original workflow application steps. Finally, an analysis of CAPIO-CL is provided, taking into consideration both language expressiveness and application performance enhancement.
@inproceedings{santimaria_capio_cl_25,
abstract = {The performance bottleneck in file-based workflows remains a pressing issue in the realm of I/O-based workflows. To address this challenge, a novel annotation language has been developed. CAPIO-CL is positioned as an innovative I/O coordination language, enabling users to annotate data dependencies within file-based workflows with synchronization semantics pertinent to the involved files and directories. Through the information provided by the language, optimization opportunities arise in streaming and preemptive data movement. This paper serves to illustrate the semantics and syntax enabling CAPIO-CL to enhance the performance of in situ workflows without necessitating the rewriting or modification of the original workflow application steps. Finally, an analysis of CAPIO-CL is provided, taking into consideration both language expressiveness and application performance enhancement.},
author = {Santimaria, Marco Edoardo and Martinelli, Alberto R. and Colonnelli, Iacopo and Cantalupo, Barbara and Torquati, Massimo and Aldinucci, Marco},
date = {2025/02/25},
date-added = {2025-02-25 19:59:05 +0100},
date-modified = {2025-02-25 20:00:33 +0100},
doi = {10.1007/s10766-025-00789-0},
id = {Santimaria2025},
isbn = {1573-7640},
journal = {International Journal of Parallel Programming},
keywords = {capio, icsc},
number = {2},
pages = {10},
title = {CAPIO-CL: The CAPIO Coordination Language},
url = {https://doi.org/10.1007/s10766-025-00789-0},
volume = {53},
year = {2025},
bdsk-url-1 = {https://doi.org/10.1007/s10766-025-00789-0}}
Alberto R. Martinelli, Massimo Torquati, Marco Aldinucci, Iacopo Colonnelli, Barbara Cantalupo
2023 IEEE 30th International Conference on High Performance Computing, Data, and Analytics (HiPC)
admire capio eupex icsc
With the increasing amount of digital data available for analysis and simulation, the class of I/O-intensive HPC workflows is fated to quickly expand, further exacerbating the performance gap between computing, memory, and storage technologies. This paper introduces CAPIO (Cross-Application Programmable I/O), a middleware capable of injecting I/O streaming capabilities into file-based workflows, improving the computation-I/O overlap without the need to change the application code. The contribution is twofold: 1) at design time, a new I/O coordination language allows users to annotate workflow data dependencies with synchronization semantics; 2) at run time, a user-space middleware automatically and transparently to the user turns a workflow batch execution into a streaming execution according to the semantics expressed in the configuration file. CAPIO has been tested on synthetic benchmarks simulating typical workflow I/O patterns and two real-world workflows. Experiments show that CAPIO reduces the execution time by 10% to 66% for data-intensive workflows that use the file system as a communication medium.
@inproceedings{23:hipc:capio,
abstract = {With the increasing amount of digital data available for analysis and simulation, the class of I/O-intensive HPC workflows is fated to quickly expand, further exacerbating the performance gap between computing, memory, and storage technologies. This paper introduces CAPIO (Cross-Application Programmable I/O), a middleware capable of injecting I/O streaming capabilities into file-based workflows, improving the computation-I/O overlap without the need to change the application code. The contribution is twofold: 1) at design time, a new I/O coordination language allows users to annotate workflow data dependencies with synchronization semantics; 2) at run time, a user-space middleware automatically and transparently to the user turns a workflow batch execution into a streaming execution according to the semantics expressed in the configuration file. CAPIO has been tested on synthetic benchmarks simulating typical workflow I/O patterns and two real-world workflows. Experiments show that CAPIO reduces the execution time by 10\% to 66\% for data-intensive workflows that use the file system as a communication medium.},
address = {Goa, India},
author = {Martinelli, Alberto R. and Torquati, Massimo and Aldinucci, Marco and Colonnelli, Iacopo and Cantalupo, Barbara},
booktitle = {2023 IEEE 30th International Conference on High Performance Computing, Data, and Analytics (HiPC)},
doi = {10.1109/HiPC58850.2023.00031},
keywords = {admire, eupex, icsc, capio},
month = dec,
publisher = {{IEEE}},
title = {{CAPIO}: a Middleware for Transparent I/O Streaming in Data-Intensive Workflows},
url = {https://iris.unito.it/retrieve/27380f37-0978-409e-a9d8-2b5e95a4bb85/CAPIO-HiPC23-preprint.pdf},
year = {2023},
bdsk-url-1 = {https://iris.unito.it/retrieve/27380f37-0978-409e-a9d8-2b5e95a4bb85/CAPIO-HiPC23-preprint.pdf},
bdsk-url-2 = {https://doi.org/10.1109/HiPC58850.2023.00031}}
Giorgio Audrito, Alberto R. Martinelli, Gianluca Torta
2023 IEEE International Conference on Autonomic Computing and Self-Organizing Systems Companion (ACSOS-C)
HPC
@inproceedings{23:acsos:fcppmpi,
author = {Audrito, Giorgio and Martinelli, Alberto R. and Torta, Gianluca},
booktitle = {2023 IEEE International Conference on Autonomic Computing and Self-Organizing Systems Companion (ACSOS-C)},
doi = {10.1109/ACSOS-C58168.2023.00054},
keywords = {HPC},
pages = {140--145},
title = {Parallelising an Aggregate Programming Framework with Message-Passing Interface},
year = {2023},
bdsk-url-1 = {https://doi.org/10.1109/ACSOS-C58168.2023.00054}}
Javier Garcia-Blas, Genaro Sanchez-Gallegos, Cosmin Petre, Alberto R. Martinelli, Marco Aldinucci, Jesus Carretero
Euro-Par 2023: Parallel Processing
admire hpc
The growing demands for data processing by new data-intensive applications are putting pressure on the performance and capacity of HPC storage systems. The advancement in storage technologies, such as NVMe and persistent memory, are aimed at meeting these demands. However, relying solely on ultra-fast storage devices is not cost-effective, leading to the need for multi-tier storage hierarchies to move data based on its usage. To address this issue, ad-hoc file systems have been proposed as a solution. They utilise the available storage of compute nodes, such as memory and persistent storage, to create a temporary file system that adapts to the application behaviour in the HPC environment. This work presents the design, implementation, and evaluation of a distributed ad-hoc in-memory storage system (Hercules), highlighting the new communication model included in Hercules. This communication model takes advantage of the Unified Communication X framework (UCX). This solution leverages the capabilities of RDMA protocols, including Infiniband, Onmipath, shared memory, and zero-copy transfers. The preliminary evaluation results show excellent network utilisation compared with other existing technologies.
@inproceedings{10.1007/978-3-031-39698-4_46,
abstract = {The growing demands for data processing by new data-intensive applications are putting pressure on the performance and capacity of HPC storage systems. The advancement in storage technologies, such as NVMe and persistent memory, are aimed at meeting these demands. However, relying solely on ultra-fast storage devices is not cost-effective, leading to the need for multi-tier storage hierarchies to move data based on its usage. To address this issue, ad-hoc file systems have been proposed as a solution. They utilise the available storage of compute nodes, such as memory and persistent storage, to create a temporary file system that adapts to the application behaviour in the HPC environment. This work presents the design, implementation, and evaluation of a distributed ad-hoc in-memory storage system (Hercules), highlighting the new communication model included in Hercules. This communication model takes advantage of the Unified Communication X framework (UCX). This solution leverages the capabilities of RDMA protocols, including Infiniband, Onmipath, shared memory, and zero-copy transfers. The preliminary evaluation results show excellent network utilisation compared with other existing technologies.},
address = {Cham},
author = {Garcia-Blas, Javier and Sanchez-Gallegos, Genaro and Petre, Cosmin and Martinelli, Alberto R. and Aldinucci, Marco and Carretero, Jesus},
booktitle = {Euro-Par 2023: Parallel Processing},
date-modified = {2024-04-01 11:17:14 +0200},
editor = {Cano, Jos{\'e} and Dikaiakos, Marios D. and Papadopoulos, George A. and Peric{\`a}s, Miquel and Sakellariou, Rizos},
isbn = {978-3-031-39698-4},
keywords = {admire, hpc},
pages = {679--693},
publisher = {Springer Nature Switzerland},
title = {Hercules: Scalable and Network Portable In-Memory Ad-Hoc File System for Data-Centric and High-Performance Applications},
year = {2023}}
Iacopo Colonnelli, Bruno Casella, Gianluca Mittone, Yasir Arfat, Barbara Cantalupo, Roberto Esposito, Alberto R. Martinelli, Doriana Medić, Marco Aldinucci
Astrophysics and Space Science Proceedings
across eupilot fl streamflow
HPC and AI are fated to meet for several reasons. This article will discuss some of them and argue why this will happen through the set of methods and technologies that underpin cloud computing. As a paradigmatic example, we present a new federated learning system that collaboratively trains a deep learning model in different supercomputing centers. The system is based on the StreamFlow workflow manager designed for hybrid cloud-HPC infrastructures.
@inproceedings{22:ml4astro,
abstract = {HPC and AI are fated to meet for several reasons. This article will discuss some of them and argue why this will happen through the set of methods and technologies that underpin cloud computing. As a paradigmatic example, we present a new federated learning system that collaboratively trains a deep learning model in different supercomputing centers. The system is based on the StreamFlow workflow manager designed for hybrid cloud-HPC infrastructures.},
address = {Catania, Italy},
author = {Colonnelli, Iacopo and Casella, Bruno and Mittone, Gianluca and Arfat, Yasir and Cantalupo, Barbara and Esposito, Roberto and Martinelli, Alberto R. and Medi\'{c}, Doriana and Aldinucci, Marco},
booktitle = {Astrophysics and Space Science Proceedings},
date-modified = {2024-04-01 11:12:57 +0200},
doi = {10.1007/978-3-031-34167-0_39},
editor = {Bufano, Filomena and Riggi, Simone and Sciacca, Eva and Schillir\`{o}, Francesco},
isbn = {978-3-031-34167-0},
keywords = {across, eupilot, streamflow, fl},
pages = {193--199},
publisher = {Springer},
title = {Federated Learning meets {HPC} and cloud},
url = {https://iris.unito.it/retrieve/3ac66baa-9d9a-4e9f-94a5-13700694d8aa/ML4Astro.pdf},
volume = {60},
year = {2023},
bdsk-url-1 = {https://iris.unito.it/retrieve/3ac66baa-9d9a-4e9f-94a5-13700694d8aa/ML4Astro.pdf}}
Giovanni Agosta, Marco Aldinucci, Carlos Alvarez, Roberto Ammendola, Yasir Arfat, Olivier Beaumont, Massimo Bernaschi, Andrea Biagioni, Tommaso Boccali, Berenger Bramas, Carlo Brandolese, Barbara Cantalupo, Mauro Carrozzo, Daniele Cattaneo, Alessandro Celestini, Massimo Celino, Iacopo Colonnelli, Paolo Cretaro, Pasqua D'Ambra, Marco Danelutto, Roberto Esposito, Lionel Eyraud-Dubois, Antonio Filgueras, William Fornaciari, Ottorino Frezza, Andrea Galimberti, Francesco Giacomini, Brice Goglin, Daniele Gregori, Abdou Guermouche, Francesco Iannone, Michal Kulczewski, Francesca Lo Cicero, Alessandro Lonardo, Alberto R. Martinelli, Michele Martinelli, Xavier Martorell, Giuseppe Massari, Simone Montangero, Gianluca Mittone, Raymond Namyst, Ariel Oleksiak, Paolo Palazzari, Pier Stanislao Paolucci, Federico Reghenzani, Cristian Rossi, Sergio Saponara, Francesco Simula, Federico Terraneo, Samuel Thibault, Massimo Torquati, Matteo Turisini, Piero Vicini, Miquel Vidal, Davide Zoni, Giuseppe Zummo
Microprocessors and Microsystems
hpc system-sw textarossa
In the near future, Exascale systems will need to bridge three technology gaps to achieve high performance while remaining under tight power constraints: energy efficiency and thermal control; extreme computation efficiency via HW acceleration and new arithmetic; methods and tools for seamless integration of reconfigurable accelerators in heterogeneous HPC multi-node platforms. TEXTAROSSA addresses these gaps through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models, and tools derived from European research.
@article{textarossa2022micpro,
abstract = {In the near future, Exascale systems will need to bridge three technology gaps to achieve high performance while remaining under tight power constraints: energy efficiency and thermal control; extreme computation efficiency via HW acceleration and new arithmetic; methods and tools for seamless integration of reconfigurable accelerators in heterogeneous HPC multi-node platforms. TEXTAROSSA addresses these gaps through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models, and tools derived from European research.},
author = {Agosta, Giovanni and Aldinucci, Marco and Alvarez, Carlos and Ammendola, Roberto and Arfat, Yasir and Beaumont, Olivier and Bernaschi, Massimo and Biagioni, Andrea and Boccali, Tommaso and Bramas, Berenger and Brandolese, Carlo and Cantalupo, Barbara and Carrozzo, Mauro and Cattaneo, Daniele and Celestini, Alessandro and Celino, Massimo and Colonnelli, Iacopo and Cretaro, Paolo and D'Ambra, Pasqua and Danelutto, Marco and Esposito, Roberto and Eyraud-Dubois, Lionel and Filgueras, Antonio and Fornaciari, William and Frezza, Ottorino and Galimberti, Andrea and Giacomini, Francesco and Goglin, Brice and Gregori, Daniele and Guermouche, Abdou and Iannone, Francesco and Kulczewski, Michal and Lo Cicero, Francesca and Lonardo, Alessandro and Martinelli, Alberto R. and Martinelli, Michele and Martorell, Xavier and Massari, Giuseppe and Montangero, Simone and Mittone, Gianluca and Namyst, Raymond and Oleksiak, Ariel and Palazzari, Paolo and Stanislao Paolucci, Pier and Reghenzani, Federico and Rossi, Cristian and Saponara, Sergio and Simula, Francesco and Terraneo, Federico and Thibault, Samuel and Torquati, Massimo and Turisini, Matteo and Vicini, Piero and Vidal, Miquel and Zoni, Davide and Zummo, Giuseppe},
date-modified = {2025-05-24 09:50:45 +0200},
doi = {10.1016/j.micpro.2022.104679},
issn = {0141-9331},
journal = {Microprocessors and Microsystems},
keywords = {textarossa, system-sw, hpc},
pages = {104679},
title = {Towards EXtreme scale technologies and accelerators for euROhpc hw/Sw supercomputing applications for exascale: The TEXTAROSSA approach},
volume = {95},
year = {2022},
bdsk-url-1 = {https://doi.org/10.1016/j.micpro.2022.104679}}
Giovanni Agosta, William Fornaciari, Andrea Galimberti, Giuseppe Massari, Federico Reghenzani, Federico Terraneo, Davide Zoni, Carlo Brandolese, Massimo Celino, Francesco Iannone, Paolo Palazzari, Giuseppe Zummo, Massimo Bernaschi, Pasqua D'Ambra, Sergio Saponara, Marco Danelutto, Massimo Torquati, Marco Aldinucci, Yasir Arfat, Barbara Cantalupo, Iacopo Colonnelli, Roberto Esposito, Alberto R. Martinelli, Gianluca Mittone, Olivier Beaumont, Berenger Bramas, Lionel Eyraud-Dubois, Brice Goglin, Abdou Guermouche, Raymond Namyst, Samuel Thibault, Antonio Filgueras, Miquel Vidal, Carlos Alvarez, Xavier Martorell, Ariel Oleksiak, Michal Kulczewski, Alessandro Lonardo, Piero Vicini, Francesco Lo Cicero, Francesco Simula, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Pier Stanislao Paolucci, Matteo Turisini, Francesco Giacomini, Tommaso Boccali, Simone Montangero, Roberto Ammendola
Proc. of the 24th Euromicro Conference on Digital System Design (DSD)
hpc streamflow textarossa
To achieve high performance and high energy efficiency on near-future exascale computing systems, three key technology gaps needs to be bridged. These gaps include: energy efficiency and thermal control; extreme computation efficiency via HW acceleration and new arithmetics; methods and tools for seamless integration of reconfigurable accelerators in heterogeneous HPC multi-node platforms. TEXTAROSSA aims at tackling this gap through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models and tools derived from European research.
@inproceedings{21:DSD:textarossa,
abstract = {To achieve high performance and high energy efficiency on near-future exascale computing systems, three key technology gaps needs to be bridged. These gaps include: energy efficiency and thermal control; extreme computation efficiency via HW acceleration and new arithmetics; methods and tools for seamless integration of reconfigurable accelerators in heterogeneous HPC multi-node platforms. TEXTAROSSA aims at tackling this gap through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models and tools derived from European research.},
address = {Palermo, Italy},
author = {Agosta, Giovanni and Fornaciari, William and Galimberti, Andrea and Massari, Giuseppe and Reghenzani, Federico and Terraneo, Federico and Zoni, Davide and Brandolese, Carlo and Celino, Massimo and Iannone, Francesco and Palazzari, Paolo and Zummo, Giuseppe and Bernaschi, Massimo and D'Ambra, Pasqua and Saponara, Sergio and Danelutto, Marco and Torquati, Massimo and Aldinucci, Marco and Arfat, Yasir and Cantalupo, Barbara and Colonnelli, Iacopo and Esposito, Roberto and Martinelli, Alberto R. and Mittone, Gianluca and Beaumont, Olivier and Bramas, Berenger and Eyraud-Dubois, Lionel and Goglin, Brice and Guermouche, Abdou and Namyst, Raymond and Thibault, Samuel and Filgueras, Antonio and Vidal, Miquel and Alvarez, Carlos and Martorell, Xavier and Oleksiak, Ariel and Kulczewski, Michal and Lonardo, Alessandro and Vicini, Piero and Lo Cicero, Francesco and Simula, Francesco and Biagioni, Andrea and Cretaro, Paolo and Frezza, Ottorino and Stanislao Paolucci, Pier and Turisini, Matteo and Giacomini, Francesco and Boccali, Tommaso and Montangero, Simone and Ammendola, Roberto},
booktitle = {Proc. of the 24th Euromicro Conference on Digital System Design ({DSD})},
date-added = {2021-09-04 12:07:42 +0200},
date-modified = {2021-09-04 12:23:41 +0200},
doi = {10.1109/DSD53832.2021.00051},
keywords = {textarossa, streamflow, hpc},
month = aug,
publisher = {IEEE},
title = {{TEXTAROSSA}: Towards EXtreme scale Technologies and Accelerators for euROhpc hw/Sw Supercomputing Applications for exascale},
year = {2021},
bdsk-url-1 = {https://doi.org/10.1109/DSD53832.2021.00051}}
Marco Aldinucci, Valentina Cesare, Iacopo Colonnelli, Alberto R. Martinelli, Gianluca Mittone, Barbara Cantalupo
ENEA CRESCO in the fight against COVID-19
hpc hpc4ai
This work exposes a practical methodology for the semi-automatic parallelization of existing code. We show how a scientific sequential code can be parallelized through our approach. The obtained parallel code is only slightly different from the starting sequential one, providing an example of how little re-designing our methodology involves. The performance of the parallelized code, executed on the CRESCO6 cluster, is then exposed and discussed. We also believe in the educational value of this approach and suggest its use as a teaching device for students.
@inproceedings{21:laplace:enea,
abstract = {This work exposes a practical methodology for the semi-automatic parallelization of existing code. We show how a scientific sequential code can be parallelized through our approach. The obtained parallel code is only slightly different from the starting sequential one, providing an example of how little re-designing our methodology involves. The performance of the parallelized code, executed on the CRESCO6 cluster, is then exposed and discussed. We also believe in the educational value of this approach and suggest its use as a teaching device for students.},
author = {Aldinucci, Marco and Cesare, Valentina and Colonnelli, Iacopo and Martinelli, Alberto R. and Mittone, Gianluca and Cantalupo, Barbara},
booktitle = {ENEA CRESCO in the fight against COVID-19},
date-modified = {2025-05-24 09:40:06 +0200},
editor = {Francesco Iannone},
keywords = {hpc, hpc4ai},
pages = {21--24},
publisher = {ENEA},
title = {Practical Parallelizazion of a {Laplace} Solver with {MPI}},
year = {2021}}
Marco Aldinucci, Valentina Cesare, Iacopo Colonnelli, Alberto R. Martinelli, Gianluca Mittone, Barbara Cantalupo, Carlo Cavazzoni, Maurizio Drocco
Journal of Parallel and Distributed Computing
HPC parallel
This work aims at distilling a systematic methodology to modernize existing sequential scientific codes with a little re-designing effort, turning an old codebase into <i>modern</i> code, i.e., parallel and robust code. We propose a semi-automatic methodology to parallelize scientific applications designed with a purely sequential programming mindset, possibly using global variables, aliasing, random number generators, and stateful functions. We demonstrate that the same methodology works for the parallelization in the shared memory model (via OpenMP), message passing model (via MPI), and General Purpose Computing on GPU model (via OpenACC). The method is demonstrated parallelizing four real-world sequential codes in the domain of physics and material science. The methodology itself has been distilled in collaboration with MSc students of the Parallel Computing course at the University of Torino, that applied it for the first time to the project works that they presented for the final exam of the course. Every year the course hosts some special lectures from industry representatives, who present how they use parallel computing and offer codes to be parallelizeda.
@article{21:jpdc:loop,
abstract = {This work aims at distilling a systematic methodology to modernize existing sequential scientific codes with a little re-designing effort, turning an old codebase into \emph{modern} code, i.e., parallel and robust code. We propose a semi-automatic methodology to parallelize scientific applications designed with a purely sequential programming mindset, possibly using global variables, aliasing, random number generators, and stateful functions. We demonstrate that the same methodology works for the parallelization in the shared memory model (via OpenMP), message passing model (via MPI), and General Purpose Computing on GPU model (via OpenACC). The method is demonstrated parallelizing four real-world sequential codes in the domain of physics and material science. The methodology itself has been distilled in collaboration with MSc students of the Parallel Computing course at the University of Torino, that applied it for the first time to the project works that they presented for the final exam of the course. Every year the course hosts some special lectures from industry representatives, who present how they use parallel computing and offer codes to be parallelizeda.},
author = {Aldinucci, Marco and Cesare, Valentina and Colonnelli, Iacopo and Martinelli, Alberto R. and Mittone, Gianluca and Cantalupo, Barbara and Cavazzoni, Carlo and Drocco, Maurizio},
date-added = {2021-06-10 22:05:54 +0200},
date-modified = {2025-05-24 09:39:51 +0200},
doi = {10.1016/j.jpdc.2021.05.017},
journal = {Journal of Parallel and Distributed Computing},
keywords = {HPC, parallel},
pages = {13--29},
title = {Practical Parallelization of Scientific Applications with {OpenMP, OpenACC and MPI}},
url = {https://iris.unito.it/retrieve/handle/2318/1792557/770851/Practical_Parallelization_JPDC_preprint.pdf},
volume = {157},
year = {2021},
bdsk-url-1 = {https://iris.unito.it/retrieve/handle/2318/1792557/770851/Practical_Parallelization_JPDC_preprint.pdf},
bdsk-url-2 = {https://doi.org/10.1016/j.jpdc.2021.05.017}}
Claudia Misale, Maurizio Drocco, Guy Tremblay, Alberto R. Martinelli, Marco Aldinucci
Future Generation Computer Systems
fastflow HPC toreador
In this paper, we present a new C++ API with a fluent interface called PiCo (Pipeline Composition). PiCo's programming model aims at making easier the programming of data analytics applications while preserving or enhancing their performance. This is attained through three key design choices: (1) unifying batch and stream data access models, (2) decoupling processing from data layout, and (3) exploiting a stream-oriented, scalable, efficient C++11 runtime system. PiCo proposes a programming model based on pipelines and operators that are polymorphic with respect to data types in the sense that it is possible to reuse the same algorithms and pipelines on different data models (e.g., streams, lists, sets, etc.). Preliminary results show that PiCo, when compared to Spark and Flink, can attain better performances in terms of execution times and can hugely improve memory utilization, both for batch and stream processing.
@article{18:fgcs:pico,
abstract = {In this paper, we present a new C++ API with a fluent interface called PiCo (Pipeline Composition). PiCo's programming model aims at making easier the programming of data analytics applications while preserving or enhancing their performance. This is attained through three key design choices: (1) unifying batch and stream data access models, (2) decoupling processing from data layout, and (3) exploiting a stream-oriented, scalable, efficient C++11 runtime system. PiCo proposes a programming model based on pipelines and operators that are polymorphic with respect to data types in the sense that it is possible to reuse the same algorithms and pipelines on different data models (e.g., streams, lists, sets, etc.). Preliminary results show that PiCo, when compared to Spark and Flink, can attain better performances in terms of execution times and can hugely improve memory utilization, both for batch and stream processing.},
author = {Misale, Claudia and Drocco, Maurizio and Tremblay, Guy and Martinelli, Alberto R. and Aldinucci, Marco},
booktitle = {Future Generation Computer Systems},
date-added = {2018-05-18 21:24:31 +0000},
date-modified = {2020-11-15 17:22:30 +0100},
doi = {10.1016/j.future.2018.05.030},
journal = {Future Generation Computer Systems},
keywords = {toreador, HPC, fastflow},
pages = {392--403},
title = {PiCo: High-performance data analytics pipelines in modern C++},
url = {https://iris.unito.it/retrieve/handle/2318/1668444/414280/fgcs_pico.pdf},
volume = {87},
year = {2018},
bdsk-url-1 = {https://iris.unito.it/retrieve/handle/2318/1668444/414280/fgcs_pico.pdf},
bdsk-url-2 = {https://doi.org/10.1016/j.future.2018.05.030}}