Events
NVIDIA – CEO Jensen Huang Keynote Watch Party
Join us to experience the keynote by Jensen Huang, NVIDIA CEO and Founder, live from GTC Berlin 2026. Get a first look at the new technologies and innovations shaping the future of AI, accelerated computing, and scientific research. An unmissable event for students, researchers, faculty, and university staff interested in the technologies transforming the world and the opportunities they will unlock in the near future.
NVIDIA Workshop – Data Parallelism: How to train deep learning models on multiple GPUs
Bruno Casella, research fellow at the Department of Computer Science of the University of Turin, and NVIDIA DLI Certified Instructor, presents "Data Parallelism: How to Train Deep Learning Models on Multiple GPUs". Some of the most common challenges we face when training modern deep learning models are exploiting increasingly larger datasets and increasingly complex models. As a result, significant and growing computing power is required to train models effectively and efficiently. Learning to distribute data across multiple GPUs during the model training phase opens the door for new and important deep learning applications.
IBM–UNITO Innovation Lab on Future Computing Technologies: Cloud, HPC, AI and QC
Il Dipartimento di Informatica dell’Università di Torino, che guida il laboratorio nazionale CINI “HPC: Key Technologies and Tools”, lo spoke “FutureHPC” del Centro Nazionale HPC, BigData e Quantum Computing (ICSC) e il laboratorio HPC4AI, estende ulteriormente la filiera dell’innovazione nella città di Torino grazie all’attivazione di un laboratorio congiunto con IBM. Il laboratorio supporterà attivamente la filiera dell’innovazione oltre che la rinnovata offerta didattica in questi ambiti.
Euro-Par 2025 – International European Conference on Parallel and Distributed Computing
Euro-Par is the prime European conference covering all aspects of parallel and distributed processing.
Introducing Arm: the most widely adopted computing architecture
Arm is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configured for various environments. It is estimated that more than 200 billions devices have been built so far, from the tiniest IoT device to the current most powerful supercomputer in the world. Daily we touch tens if not hundreds of Arm-based microcontrollers and processors. The present lecture will introduce the Arm architecture, its history and its key characteristics (in particular Arm-based high-end CPU powering current and future supercomputers).
How to optimize an HPC system among the ten most powerful in the world
With real-world applications, it is unlikely that all the resources of a cluster node can be fully utilized at the same time by a single application. Consider, for example, the likelihood of a hypothetical application that can fully exploit the accelerator and the network card’s available bandwidth at the same time. Therefore, whenever a single application completely exhausts one of the node’s resources, it might prevent the possibility for other applications to exploit the remaining resources, which are likely to remain partially unused. For instance, there are many applications that are data-intensive, and seismic imaging is one of those. With data-intensive computations, the bottleneck is likely to be memory bandwidth, memory size, network congestion, and/or storage access, while computing units may or may not be stressed to their maximum. Moreover, since most of the seismic imaging algorithms are embarrassingly parallel, in the context of a seismic imaging multi-user and multi-project scenario the challenge often is to efficiently execute a very large number of asynchronous and loosely coupled tasks. This combines with the nature of modern full-wave imaging and velocity analysis, which results in variability of memory requirement and computing unit occupancy that can span several orders of magnitude (according to the geophysical parameter of the maximum frequency of the analysis). Accordingly, whenever the majority of the workload has these characteristics, in our experience there are several recommendable actions that can be undertaken to maximize cluster resource utilization: pack more than one job on each node; if needed, apply strong scaling do prevent a single job from exhausting any of the node resources; if applicable, run lightweight distributed services to relax some of their bottlenecks
HPC architecture overview
The presentation deals with the HPC architecture, analyzing the general characteristics of a high-performance computing cluster both from the hardware point of view and from the management software point of view. Some Important trendy features will be presented that expand those of the classic HPC cluster.
Quantum Computing: A hype-avoiding introduction
Quantum computing is generating more hype than ever among the race to boast the most qubits and prophecies about encryption Armageddon, but how much of this hype is reasonable? This talk will start with a brief introduction to quantum computation, then it will present the main technical features and challenges of the most popular approaches to quantum computing (quantum gates, annealing, and, briefly, quantum simulators). Doing this, will try to avoid all this hype and provide an honest review of what is possible, and useful, to achieve on current Noisy intermediate-scale quantum machines, with a particular focus on combinatorial optimization. Finally, a short demo of an optimization problem solved on D-Wave machines will be provided.
High-Performance Computing and Digital Transformation
In a recent speech, IBM CEO Arvind Krishna said that: “digital transformation has been accelerated during the COVID-19 pandemic, and ultimately every company will become an AI company.” This is not strictly true, but what is true is that every company will have to adopt AI technologies. AI is considered in a broad meaning. We can be more precise by saying that every industry will have to apply digital technologies to determine a paradigm shift. The value of goods/services moves from the exploitation of physical systems to the exploitation of knowledge. AI, computer simulations, and other digital technologies help mine out more knowledge faster. The more, the better. In this scenario, HPC is a tool to process BigData, enable AI, and perform simulations; it can accelerate the creation of value thanks to generating new knowledge and performing more accurate predictions. Whereas computational capacity is a fundamental resource for competitiveness, row computational capacity alone is useless, a crunching device transforming sequences of 1 and 0 into other sequences of 1 and 0. The software is the key to unlock the value. This is why, besides the supercomputer, we need to create the capability to implement applications or improve the already existing ones. In the talk, I will present how Leonardo, with the key contribution of the HPC Lab, intends to implement leadership software tools and computational infrastructure able to add value to the company and ultimately transform it to be more digital than physical.
Cloud Computing and what you can do with it
Research on cloud computing and infrastructures is highly relevant to both industry and academia. According to Gartner, Inc., more than 75% of organizations using cloud services, indicate that they have a cloud-first strategy, meaning that there is a strong shift from traditional on-premises data centers to cloud-based technologies and resources. This allows organizations to use computing, network, and storage resources made available by cloud providers, without the need of taking care of the maintenance of such resources. In this seminar, we will see what is cloud computing and what kind of services it provides, and the different flavors of cloud computing. We will also talk about how we can write programs to run on the cloud, namely cloud-native applications, with a particular focus on container technologies and the de-facto container orchestrator, Kubernetes. Finally, we will move towards cloud and high-performance computing convergence, and the efforts IBM Research and Red Hat OpenShift are doing to close the gap, in collaboration with National Laboratories and the open-source community.
Practical Distributed Programming in C++
The need for coupling high performance with productivity is steering the recent evolution of the C++ language where low-level aspects of parallel and distributed computing are now part of the standard or under discussion for inclusion. The Standard Template Library (STL) includes containers and algorithms as primary notions, coupled with execution policies that allow exploiting parallel platforms (e.g., multi-cores) on top of a well-defined operational semantics. However, as of today, there is no support for distributed-memory platforms. Namely, as opposed to the so-called parallel STL, there is no such thing as a “distributed STL”. In this lecture, I will discuss the first state-of-the-art effort towards a distributed STL, which I led as member of the HPC group at the Pacific Northwest National Laboratory (PNNL), in 2019. The effort yielded the design and implementation of a stack for STL-compliant programs (containers, iterators, algorithms, and execution policies) running on distributed-memory systems. The distributed STL is currently in the process of being proposed for C++ standardization.
How to program NVIDIA GPU: past, present and future
The idea of General Purpose GPU Computing (GPGPU) is more than a decade old. Over time, it took off and it has become ubiquitous. It is widely recognized by the HPC community that to reach the next milestone in performance, the Exascale, an accelerated system will be required to meet power and budget constraints. NVIDIA is not the only technology provider with a portfolio of GPU technology but it has been the first to believe in the relevance of accelerated computing and investing both in hardware and software innovation. Hardware is difficult, software is as difficult or even harder. Any hardware technology difficult to the program will inevitably die or becoming irrelevant. Investing in the software ecosystem and developer tools is essential for any technology success. This talk will provide an overview of languages (mainly C/C++, Fortran, and Python) and programming models and frameworks that can be used to develop code for NVIDIA GPU. NVIDIA strategy and vision about parallel computing will be discussed and few examples will be shown to highlight the pros and cons of the various approaches. The talk does not require any prior knowledge of GPU computing.
Architetture a 8bit a confronto, Atmega328p vs. Atmega32u4
The presentation deals with the HPC architecture, analyzing the general characteristics of a high-performance computing cluster both from the hardware point of view and from the management software point of view. Some Important trendy features will be presented that expand those of the classic HPC cluster.