Graduate Computer Science teaching (A.A. 2018-19)
Computer Architectures (MFN0586)
– Introduction to structured computer organization: Von Neumann architecture, virtual machines;
– Information coding: binary numbers, conversion between bases, negative numbers, operations on binary numbers, floating point numbers and IEEE 754 standard;
– Digital logic level: logic gates and Boole’s algebra, logic circuits, latch, flip-flop, registers, memory chips, RAM and ROM;
– Memory and memory organization: memory organization, cache memory, secondary memory;
– The bus;
– The Microarchitecture Level: CPU organization and instruction execution, examples of microarchitecture, ISA IJVM, the microprogram for the Mic-1 architecture, Mic-1 architecture optimization (Mic-2), a pipeline architecture (Mic-3);
– The ISA level: summary of the ISA level, features, memory models, registers and instructions, addressing modalities, instruction formats, data types and instructions at the ISA level, flow control, I/O, interrupts, traps;
– Assembler, linker, loader
48+12 teaching hours – 6 didactic credits – 2nd didactic period. More information here
Parallel and Distributed Systems (MFN0795)
- Introduction to the architecture of parallel and distributed computer systems: shared memory (SMP, multi-core), multicomputers (multiprocessor, cluster, grid), GPGPUs.
- Programming paradigms: low-level of abstraction (message passing, shared memory), case studies, high-level of abstraction (skeletons, patterns).
- Examples and case studies: programming exercises with threads and MPI, programming GPGPU with SIMT model.
48 teaching hours – 6 didactic credits – 2nd didactic period.
Unified course held for the Computer Science and Physics Master Degrees.
More information for Computer Science (LM Informatica), and Physics (LM Astrofisica e Fisica Teorica, Fisica dell’Ambiente e delle Tecnologie Avanzate, Astrofisica e Raggi Cosmici, Fisica dell’Ambiente, Fisica delle Tecnologie Avanzate, Fisica Nucleare e Sub-nucleare, Fisica ind. Fisica Teorica).
GPGPUs: Architecture and programming model (part of Advanced Computer Architectures, MFN0969)
A series of lectures on architecture and programming of GPGPUs held within the Daniele Gunetti’s course on Advanced Computer Architectures.
12 teaching hours – 1st didactic period.
Course held for the Computer Science Master Degree (LM Informatica).
More information here.
Graduate and undergraduate Computer Science teaching (previous years)
- aaa Operating Systems and Computer Networking (2013/14
- Anatomy of the cloud (PhD school in Computer Science @ IMT Lucca) Cloud computing data centers are structured into tiers. We aim at understanding the breakdown, their connection to the Web Services architecture, and the very different properties and constraints that apply in each tier. At every level of the cloud we struggle with deep tradeoffs: rapid response and scalability tend to fight against techniques that provide strong guarantees. Berkeley’s Eric Brewer captured one of these in his CAP theorem, which says you can have just two of Consistency, Availability, Fault or Partition Tolerance. Although the Gilbert and Lynch proof applies only in WAN settings, we will try to speculate on CAP implications in the first tier of a typical cloud computing data center. In the three lessons we will focus on CAP theorem and its implications approaching the problem from three different research perspectives: 1) Distributed systems, theoretical 2) Parallel computing, algorithmic 3) Cloud, technological
- Continuous learning for secondary school teachers “Tirocinio Formativo Attivo” (2012/13, 40 hours), Computer Science Department, University of Torino, Classe TFA 033 – Technology. Topics: Introduction to Computer Science.
- Parallel and Distributed Systems (2009/10, 2011/12, 2012/13, 48 hours): laurea magistrale in Physics and Computer Science, University of Torino. Topics: Parallel and distributed programming.
- Advanced Computer Architectures (2011/12, 2012/13, 12 hours): laurea magistrale in Computer Science, University of Torino. Topics: Architecture and programming model of GPGPUs.
- Operating Systems and Computer Networking (2011/12, 2012/13, 2013/14, 48hours): laurea magistrale in Communications and Transmissions for Officers School of Italian Army (Scuola di Applicazione e Istituto di Studi militari dell’Esercito). Topics: Operating systems concepts and network protocols.
- Computer Networking and Internet (2008/09, 36 hours): within undergraduate programme in Computer Science, University of Torino. Topics: Network protocols, HTTP, HTML, CSS, PHP.
- Web server-side programming (2008/09, 24 hours): within undergraduate programme in Computer Science, University of Torino. Topics: 3-tier Web architectures, JSP, JDBC
- Computer Architecture (2008/09, 40 hours): within master in “Esperti di sviluppo di sistemi interoperabili orientati all’ e-business”, organised by Computer Science Dept., University of Pisa, TXT e-solutions, ICAR, Consorzio Milano Ricerche e Luiss University. Topics: Computer Organization and Design: introduction to assembler, firmware and hardware levels
- Virtualisation techniques (2006/07, 6 hours): within master in “Gestione del software open source”, organised by Computer Science Dept., University of Pisa. Topics: Emulation, para-virtualisation, binary translation.
- Computer Architecture (2005/06, 2006/07, 10 hours): within master in “Gestione del software open source”, organised by Computer Science Dept., University of Pisa. Topics: – Computer Organization and Design: introduction to assembler, firmware and hardware levels.
- Computer Architecture (2004/05, 2006/07, 40 hours): within “Scuola Speciale per l’Insegnamento Secondario (SSIS) Toscana, Classe 42/A e D.M.85/05-L.143/04 Informatica”, Computer Science Department, University of Pisa.
- QoS in grid-aware applications (2006/07, cycle of lectures): Seminaire du Magistere d’Informatique et Modelisation, Ecole Normale Superieure de Lyon, France.